Alif Semiconductor /AE512F80F5582AS_CM55_HP_View /ETH /ETH_MAC_SYSTEM_TIME_NANOSECONDS_UPDATE

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Interpret as ETH_MAC_SYSTEM_TIME_NANOSECONDS_UPDATE

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TSSS0 (Val_0x0)ADDSUB

ADDSUB=Val_0x0

Description

System Time Nanoseconds Update Register

Fields

TSSS

Timestamp Sub Seconds The value in this field is the sub-seconds part of the update. When ETH_MAC_SYSTEM_TIME_NANOSECONDS_UPDATE[ADDSUB] is reset, this field must be programmed with the sub-seconds part of the update value, with an accuracy based on the ETH_MAC_TIMESTAMP_CONTROL[TSCTRLSSR] bit. When ETH_MAC_SYSTEM_TIME_NANOSECONDS_UPDATE[ADDSUB] is set, this field must be programmed with the complement of the sub-seconds part of the update value as described below. When the ETH_MAC_TIMESTAMP_CONTROL[TSCTRLSSR] bit set, the programmed value must be 10^9 - . When the ETH_MAC_TIMESTAMP_CONTROL[TSCTRLSSR] bit reset, the programmed value must be 2^31 - <sub-second_value>. When the TSCTRLSSR bit is reset in the ETH_MAC_TIMESTAMP_CONTROL register, each bit represents an accuracy of 0.46 ns. When the TSCTRLSSR bit is set in the ETH_MAC_TIMESTAMP_CONTROL register, each bit represents 1 ns and the programmed value should not exceed 0x3B9A_C9FF. For example, if 2.000000001 seconds need to be subtracted from the system time, then the TSSS field must be 0x7FFF_FFFF (that is, 2^31 - 1), when the ETH_MAC_TIMESTAMP_CONTROL[TSCTRLSSR] bit reset and 0x3B9A_C9FF (that is, 10^9 - 1), when the ETH_MAC_TIMESTAMP_CONTROL[TSCTRLSSR] bit set.

ADDSUB

Add or Subtract Time When this bit is set, the time value is subtracted with the contents of the update register. When this bit is reset, the time value is added with the contents of the update register.

0 (Val_0x0): Add time

1 (Val_0x1): Subtract time

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